The present disclosure relates to delta sigma modulators, as well as receiver devices and wireless communication devices provided with the delta sigma modulators, and in particular, to a delta sigma modulator including an integrator having an operational amplifier.
In general, a continuous-time delta sigma modulator includes, as a loop filter (a filter circuit), an Active-RC filter including integrators connected in cascade and each having an operational amplifier, or a gm-C filter including integrators connected in cascade and each having an operational transconductance amplifier (an OTA) and a capacitive element.
Generally, to a node between an output section of a loop filter (a filter circuit) including cascaded integrators having an operational amplifier(s) and an input section of a quantizer, any one of the following signals is added: an analog input signal, a feedforward signal obtained from an output signal of at least one stage of the cascaded integrators, or a feedback signal (an analog signal) obtained by subjecting a digital output signal from the quantizer to digital-to-analog conversion. Signal addition by using an operational amplifier and a resistive element and signal addition by using only a resistive element are known as applicable methods for adding a signal to the input section of the quantizer.
A technique to add, by using an operational amplifier and a resistive element, a signal to an input section of a quantizer of a continuous-time delta sigma modulator which includes integrators connected in cascade and each having an operational amplifier(s) is disclosed. See Lukas Dorrer, et al., “A 10-bit, 4 mW continuous-time sigma-delta ADC for UMTS in a 0.12 μm CMOS process”, Circuits and Systems, ISCAS '03, 25-28 May 2003, vol. 1, p. 14057-1-1060, (2003).
Another technique to add a signal to an input section of a quantizer included in a fifth-order continuous-time delta sigma modulator by using only a resistive element is disclosed. See Kazuo Matsukawa, et al., “A fifth-order continuous-time delta-sigma modulator with single-opamp resonator”, IEEE JSSC, vol. 45, no. 4, p. 697-706, (April 2010).
Japanese Patent No. 4567420 describes a technique related to a gm-C filter circuit which is capable of performing phase compensation with a reduced power consumption, and a delta-sigma analog-to-digital (A/D) convertor provided with the gm-C filter circuit.